International Journal of Innovative Research in Computer and Communication Engineering
ISSN Approved Journal | Impact factor: 8.771 | ESTD: 2013 | Follows UGC CARE Journal Norms and Guidelines
| Monthly, Peer-Reviewed, Refereed, Scholarly, Multidisciplinary and Open Access Journal | High Impact Factor 8.771 (Calculated by Google Scholar and Semantic Scholar | AI-Powered Research Tool | Indexing in all Major Database & Metadata, Citation Generator | Digital Object Identifier (DOI) |
| papers | Design and Stimulation of Reliable Low Power CMOS Logic Gates M.Subhashree, Vinisha.V, Dr.J.Jebha johannah UG Student, Dept. of ECE., St. Joseph’s Institute of Technology, Chennai, India UG Student, Dept. of ECE., St. Joseph’s Institute of Technology, Chennai, India Professor, Dept. of ECE., St. Joseph’s Institute of Technology, Chennai, India DOI: 10.15680/IJIRCCE.2022.1005284 |
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| pdf/VzMr68ZtDCjxOlz1gPxUtoJXFYV5oxk30HZIOfhw.pdf |
