International Journal of Innovative Research in Computer and Communication Engineering
ISSN Approved Journal | Impact factor: 8.771 | ESTD: 2013 | Follows UGC CARE Journal Norms and Guidelines
| Monthly, Peer-Reviewed, Refereed, Scholarly, Multidisciplinary and Open Access Journal | High Impact Factor 8.771 (Calculated by Google Scholar and Semantic Scholar | AI-Powered Research Tool | Indexing in all Major Database & Metadata, Citation Generator | Digital Object Identifier (DOI) |
| papers |
A Low Power Timing Error Tollerant Circuit by Controlling a Clock G. Sreenivasa Raju, M Haritha, M Jeevana Jyothi, T Aparna Assistant Professor, Department of ECE, Anurag University, Hyderabad, India Student, Department of ECE, Anurag University, Hyderabad, India Student, Department of ECE, Anurag University, Hyderabad, India Student, Department of ECE, Anurag University, Hyderabad, India DOI: 10.15680/IJIRCCE.2024.1209024 |
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| pdf/J6l0NCMo36LZRDXXtMrh0wRNTwxNVdNqiHliuTpS.pdf |
